The interrupt system

The structure of SINTRAN III is greatly simplified by use of the different program levels in NORD-100. By running independent tasks on different program levels, all priority decisions are determined by hardware and microprogram. This is extremely efficient because almost no overhead takes place due to the rapid level switching.

The NORD-100 has 16 program levels. Each of these has a complete register set, including A, D, T, X, B, L, P, Status and Paging Control Registers (PCR). A change of level needs approx. 5 microseconds.

An interrupt to a special level means that the corresponding bit in the Priority Interrupt Detect (PID) register is set by an internal or external condition. The bits in this register may be set by hardware or software and cleared by software. A change to a special level is only legalized if the corresponding bits in the Priority Interrupt Enable (PIE) register has been set by the SINTRAN III operating system itself, by an RT program or by a direct task.

A change to a higher level is performed by hardware when an enabled interrupt occurs. If two or more interrupts appear simultaneously, the one with the highest priority (level) will be executed first. Interrupts to levels lower than the one running will activate that level, when all higher levels have given up priority, by executing the WAIT instruction, which results in a drop to a lower level.

SINTRAN III uses the levels as follows:

15 Not used
14 Internal interrupt
13 real-time clock interrupt and driver
12 input interrupt and drivers
11 Mass storage interrupt and drivers
10 Output interrupt and drivers
 9 levels 9 - 5 are free to be used for direct tasks.
 8
 7
 6
 5
 4 INBT / OUTBT operations
 3 Monitor
 2 Free to be used for direct tasks
 1 RT programs, Time-sharing and Batch programs
 0 Idle loop

Level 15 is not used.

Level 14 is activated by monitor calls (the MON instruction) or by internal errors detected by the hardware. possible conditions are: power fail, memory out of range, memory parity error, IOX time-out error, privileged instructions, Z indicator is set, illegal instruction, page fault and memory protect violation.

Level 13 receives an interrupt each 20th millisecond. This leads t and updating of the real-time clock.

Levels 12 - 10 are activated by external I/O interrupts. The appropriate driver routine will be started. Interrupts concerning byte / word oriented input operations have higher priority than interrupts related to mass storage devices with direct memory access and byte / word oriented output operations. The reason for this is that such input operations are not always initiated and controlled by the SINTRAN III operating system itself, but may also be activated by an external process or by a keyboard operator.

Level 4 is used fr performing INBT / OUTBT operations.

Level 3 is occupied by the SINTRAN III monitor, which performs all administration jobs such as: starting up, aborting and terminating user programs, reserves and releases devices, segment and page handling, etc.

User programs are executed on level 1.

When an interrupt to a higher level occurs, the execution starts from the instruction pointed at by the P register of that level. A short interrupt analysis might take place and the most necessary and time critical functions will be performed.

Normally, levels 10-14 complete their operations by activating the SINTRAN III monitor on level 3, which executes some administration jobs, i.e., loads a new RT program, changes priority of background programs, etc., before control is given to a user program on level 1.

Level 0 is occupied by the idle loop. This is a small program which increments the D register with 1 each time it runs through the loop. By displaying the D register of level 0 on the lamp register of the operator's panel, it is possible to observe the load of the activity in the NORD-100 computer. With no other activity in the computer, the idle loop counts up the D register completely, approximately 40 - 50 times per minute. This may be measured exactly by watching how many times the most significant bit of the D register lights up during one minute. This number may be compared with the corresponding number when there is a certain activity in the system. The quotient may, thus, supply the user with a rough idea of the loading of the computer under certain conditions.

The X register on level 0 contains the least significant part of the internal clock and is incremented each 20th millisecond. The T register contains the contents of the memory location addressed by the OPR register. This might be utilized to observe the dynamic change of certain memory locations.

Levels 9-5 and 2 are not covered by the SINTRAN III operating system, but are free to be used by direct tasks. Programs implemented on these levels will run completely independent of SINTRAN III and may not use any monitor calls, files or other facilities supplied by the operating system.